Low power Gb/s CMOS interfaces

Abstract

For high-speed digital systems, it is important to develop point-to-point Gb/s interfaces that consume low power during low-transition-rate operation. This paper presents two novel Gb/s CMOS interfaces. One uses an active-pull-up (APU) technique to raise the maximum transmission speed. In the other interface, the transmission wave form is changed from digital to impulse to markedly reduce power consumption at low transition rate.