A 13-bit, 160 kHz, differential analog to digital converter

Abstract

The author describes a 13-bit, 160-kHz differential ADC (analog-to-digital converter), and an 80-kHz version, both including a reference circuit delivering two voltages that are symmetrical with respect to the power supply midpoint. These circuits are implemented in the 1.2- mu m CMOS double-metal process using an extra n+ diffusion to accommodate poly/n+ capacitors. Starting from the k-bit linearity requirement for the capacitor array and considering previous results, the bits were partitioned into P=4 bits for the resistor-string and K=9 bits for the capacitor array. The fast Fourier transform (FFT) result is shown for a 5-kHz sine-wave full-scale input sampled at 160 kHz. The performance of the circuit is summarized.<>