Substrate noise coupling effect characterization for RF CMOS LC VCOs

S. Magierowski, K. Iniewskir, C. Siu
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引用次数: 4

Abstract

A generic, mixed-mode 0.18-/spl mu/m substrate is studied using a finite-element device simulator. The isolation properties of the device are extracted for guard ring structures of varying width. The effect of the substrate filtering on randomly switching noise is studied in the context of a 5-GHz CMOS LC-VCO's phase noise performance. Poor high frequency noise damping (/spl sim/ -20 dB) in the substrate due to inductive blocking is responsible for significant degradation of oscillator phase noise in simulation. Measurement results of wideband substrate noise effects on oscillator phase noise are included.
射频CMOS LC压控振荡器的衬底噪声耦合效应表征
利用有限元器件模拟器研究了一种通用的混合模式0.18-/spl mu/m衬底。对于不同宽度的保护环结构,提取了该装置的隔离特性。以5ghz CMOS LC-VCO的相位噪声性能为研究对象,研究了衬底滤波对随机开关噪声的影响。由于电感阻塞,基片中的高频噪声阻尼(/spl sim/ -20 dB)较差,是仿真中振荡器相位噪声显著降低的原因。给出了宽带衬底噪声对振荡器相位噪声影响的测量结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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