VLSI interconnect signal analysis using a projection framework method

Abstract

The Elmore base delay calculation method has long been in use, but this method cannot meet accuracy demands of current designs using deep sub-micron processes. On the other hand, SPICE can provide high accuracy, but it is very time consuming. Therefore, a novel, highly accurate and high-speed delay analysis method is proposed: MOR (model order reduction). We applied it in interconnect signal analysis to evaluate its performance