A Consideration of the Number of Horizontal Grids used in the Routing of a Masterslice Layout

Abstract

In the masterslice LSI, since the wiring area is fixed, local wiring congestion is likely to occur, which may cause the occurrence of some wiring nets to be unroutable. If the number of grids used in the routing can be accurately predicted before the wire routing, it is possible to reduce greatly the occurrence of wiring nets to be unroutable. This paper describes that the minimum number of horizontal grids used in a routing can be theoretically proved under the condition that the net interconnecting n terminals has at most n sites for trunk partitions. The experimental results on a masterslice LSI with 624 gate cells are in good agreement with the theoretical results.