System level modeling of smart power switches using SystemC-AMS for digital protection concept verification

Abstract

This paper presents a method for the compact modeling, simulation and experimental verification of digital protection functions of smart power switches consisting of a digital controller and a power MOSFET with analog driving circuitry. We focus on short circuit events in an automotive environment where high power dissipation and thermal stress severely affect device reliability. For accurate temperature calculation, a non-linear thermal network including coupling between power transistor channels is used. A digital strategy for over current limitation, short circuit detection and over-temperature shutdown is modeled using SystemC-AMS and verified experimentally using a hardware-in-the-loop system.