Equivalent circuit representation and dimension reduction technique for efficient FDTD modeling of power/ground plane

IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565) Pub Date : 2001-10-29 DOI:10.1109/EPEP.2001.967632

Heeseok Lee, Hyungsoo Kim, Jingook Kim, Y. Jeong, Joungho Kim

引用次数: 3

Abstract

We rigorously present a time-domain simulation method for the prediction of the simultaneous switching noise (SSN) in high-speed digital systems, using power/ground plane modeling of an arbitrarily shaped board or package.

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功率/地平面FDTD高效建模的等效电路表示与降维技术

我们严格提出了一种时域仿真方法，用于预测高速数字系统中的同步开关噪声(SSN)，使用任意形状的板或封装的电源/地平面建模。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No. 01TH8565)

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