{"title":"Development of Foundation Fieldbus H1 Controller IC","authors":"T. P. Mussolini, F. Ramos, R. Moreno, T. Pimenta","doi":"10.1109/LASCAS.2019.8667588","DOIUrl":null,"url":null,"abstract":"This work presents the implementation of a Foundation Fieldbus Controller circuit to provide interface to CPU/MCU. The implemented integrated circuit satisfies the high performance requirements of industrial network equipments, according to IEC 61158-2. The circuit consists of Manchester encoder/decoder, time-critical hardware timers and other functions necessary to implement the data link layer for industrial networks using Foundation Fieldbus H1 protocols. The communication between the CPU/MPU and the proposed device is conducted by I2C serial communication standard. This paper describes the main characteristics of the developed ASIC. The circuit was fabricated on XFAB XH035 CMOS technology and it can be used as an alternative to commercial models that work with the old parallel ports that are leaving the market.","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2019.8667588","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This work presents the implementation of a Foundation Fieldbus Controller circuit to provide interface to CPU/MCU. The implemented integrated circuit satisfies the high performance requirements of industrial network equipments, according to IEC 61158-2. The circuit consists of Manchester encoder/decoder, time-critical hardware timers and other functions necessary to implement the data link layer for industrial networks using Foundation Fieldbus H1 protocols. The communication between the CPU/MPU and the proposed device is conducted by I2C serial communication standard. This paper describes the main characteristics of the developed ASIC. The circuit was fabricated on XFAB XH035 CMOS technology and it can be used as an alternative to commercial models that work with the old parallel ports that are leaving the market.