F. Gianesello, C. Durand, O. Bon, D. Gloria, B. Rauber, C. Raynaud
{"title":"Small-size low losses GSM and DCS harmonic filters integrated in a low cost 130 nm high resistivity SOI CMOS technology","authors":"F. Gianesello, C. Durand, O. Bon, D. Gloria, B. Rauber, C. Raynaud","doi":"10.1109/SMIC.2010.5422952","DOIUrl":null,"url":null,"abstract":"RF front end modules (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, we see significant research concerning FEM integration on silicon [1]. In this quest, SOI technology has already addressed two key blocks, the antenna switch and the power amplifier. In this paper, we will focus our investigation on high performance passives functions in order to demonstrate the capability of SOI CMOS technology to integrate the whole FEM. To do so, GSM and DCS harmonic filters have been achieved in a 130 nm SOI CMOS technology. Measured performances (insertion losses ∼1dB and harmonic rejection greater than 30 dB) are clearly competitive with most commercially available Integrated Device Passive (IPD) solutions.","PeriodicalId":404957,"journal":{"name":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMIC.2010.5422952","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
RF front end modules (FEMs) are currently realized using a variety of technologies. However, since integration drives wireless business in order to achieve the appropriate cost and form factor, we see significant research concerning FEM integration on silicon [1]. In this quest, SOI technology has already addressed two key blocks, the antenna switch and the power amplifier. In this paper, we will focus our investigation on high performance passives functions in order to demonstrate the capability of SOI CMOS technology to integrate the whole FEM. To do so, GSM and DCS harmonic filters have been achieved in a 130 nm SOI CMOS technology. Measured performances (insertion losses ∼1dB and harmonic rejection greater than 30 dB) are clearly competitive with most commercially available Integrated Device Passive (IPD) solutions.