Yoonah Paik, Miseon Han, Kyu Hyun Choi, Minseong Kim, S. Kim
{"title":"Cycle-accurate full system simulation for CPU+GPU+HBM computing platform","authors":"Yoonah Paik, Miseon Han, Kyu Hyun Choi, Minseong Kim, S. Kim","doi":"10.23919/ELINFOCOM.2018.8330603","DOIUrl":null,"url":null,"abstract":"Nowadays GPUs have evolved into a general purpose computing platform that can handle large amounts of data, and they began to be integrated with CPUs in one chip to avoid data transfer bottleneck and reduce its required energy. Furthermore, HBM works with the integrated CPU and GPU for providing high memory throughput from lower-level memories while preserving energy efficiency for data transfer. In order to study and develop such systems in academia and industry, their cycle-accurate full system simulators became necessary, but they are not available in public. In this paper, we introduce the simulator that is adapted and integrated from several well-known simulators, i.e., PTLSim for CPU, GPGPU-Sim for GPU and DRAMSim2 for HBM. Our evaluation result showed that our simulation speed reaches 72.76% of the GPU+HBMsimulator.","PeriodicalId":413646,"journal":{"name":"2018 International Conference on Electronics, Information, and Communication (ICEIC)","volume":"159 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 International Conference on Electronics, Information, and Communication (ICEIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/ELINFOCOM.2018.8330603","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Nowadays GPUs have evolved into a general purpose computing platform that can handle large amounts of data, and they began to be integrated with CPUs in one chip to avoid data transfer bottleneck and reduce its required energy. Furthermore, HBM works with the integrated CPU and GPU for providing high memory throughput from lower-level memories while preserving energy efficiency for data transfer. In order to study and develop such systems in academia and industry, their cycle-accurate full system simulators became necessary, but they are not available in public. In this paper, we introduce the simulator that is adapted and integrated from several well-known simulators, i.e., PTLSim for CPU, GPGPU-Sim for GPU and DRAMSim2 for HBM. Our evaluation result showed that our simulation speed reaches 72.76% of the GPU+HBMsimulator.