LADA methodologies to localize embedded memory failure

Abstract

Dynamic Laser Stimulation (DLS) techniques have met with great success to debug integrated circuit (IC) soft failure. Laser assisted device alteration (LADA) is one of the DLS technique well-established to tackle speed-path failure and analysis of defect-free performance limiting circuits. In this work, we discuss atypical LADA analysis to localize system-on-chip (SOC) memory manufacturing soft and hard defects.