H. Madureira, Antoine Gros, N. Deltimple, Magali Dematos, S. Haddad, D. Belot, E. Kerhervé
{"title":"Design and measurement of a 2.5 GHz switched-mode CMOS power amplifier with reliability enhancement","authors":"H. Madureira, Antoine Gros, N. Deltimple, Magali Dematos, S. Haddad, D. Belot, E. Kerhervé","doi":"10.1109/IEEE-IWS.2016.7585406","DOIUrl":null,"url":null,"abstract":"Design and measurement results of an integrated class EF2 power amplifier on CMOS technology are presented. The class EF2 power amplifier presents lower voltage stress than its class E counterpart due to waveform engineering. The presented circuit was designed in standard ST Microelectronics CMOS 130nm and is able to deliver 19dBm RF output power from a 2 V supply voltage with 35% drain efficiency and 32% PAE at 2.5GHz. The output power spectrum presents 33dB power difference between the fundamental frequency and the strongest upper harmonic. A discussion about ground impedance is made and a PCB is used to reduce low ground inductance and DC decoupling.","PeriodicalId":185971,"journal":{"name":"2016 IEEE MTT-S International Wireless Symposium (IWS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE MTT-S International Wireless Symposium (IWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEEE-IWS.2016.7585406","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Design and measurement results of an integrated class EF2 power amplifier on CMOS technology are presented. The class EF2 power amplifier presents lower voltage stress than its class E counterpart due to waveform engineering. The presented circuit was designed in standard ST Microelectronics CMOS 130nm and is able to deliver 19dBm RF output power from a 2 V supply voltage with 35% drain efficiency and 32% PAE at 2.5GHz. The output power spectrum presents 33dB power difference between the fundamental frequency and the strongest upper harmonic. A discussion about ground impedance is made and a PCB is used to reduce low ground inductance and DC decoupling.