Reduced-latency LLR-based SC List Decoder for Polar Codes

Abstract

Polar codes, as the new generation of channel codes, have potential applications in communication and storage systems. Successive-cancellation list (SCL) algorithm is the main decoding approach for improving the error-correcting performance of polar codes. Recently low-complexity SCL decoders in the log-likelihood-ratio (LLR) form were proposed to replace the original ones in the likelihood form. However, these LLR-based SCL decoders can only decode 1 bit in one cycle, which leads to very long latency. This paper, for the first time, presents a reduced-latency LLR-based SCL decoder. With the new decoding scheme that determines 2 bits simultaneously, the proposed (n, k) decoder reduces the entire decoding latency from 3n-2 to 3n-2 clock cycles with the same critical path delay as the prior LLR-based SCL decoders. As a result, the decoding throughput and hardware efficiency are increased by a factor of 1.5. In addition, compared to a prior reduced-latency non-LLR-based SCL decoder, the proposed work reduces the area by two times as well.