Anti-fuse memory array embedded in 14nm FinFET CMOS with novel selector-less bit-cell featuring self-rectifying characteristics

Y. Liu, M. Chi, Anurag Mittal, G. Aluri, S. Uppal, P. Paliwoda, E. Banghart, K. Korablev, B. Liu, M. Nam, M. Eller, S. Samavedam
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引用次数: 9

Abstract

A novel anti-fuse memory array is presented in this paper featuring one-capacitor (1C) per bit-cell design and fully compatible with 14nm FinFET CMOS technology. The rectifying I-V characteristics of the metal-insulator-semiconductor (MIS) structure after programming prevents the sneak current in the cross-point array, therefore no need for select transistor in each cell. Thus enables the smallest reported bit-cell with area measuring 0.036 μm2.
在14nm FinFET CMOS中嵌入具有自整流特性的新型无选择器位单元的防熔丝存储器阵列
本文提出了一种新型的防熔丝存储阵列,该阵列采用单电容(1C) /位单元设计,完全兼容14nm FinFET CMOS技术。编程后的金属-绝缘体-半导体(MIS)结构的整流I-V特性防止了交叉点阵列中的潜流,因此无需在每个单元中选择晶体管。从而实现了最小的比特单元,其面积为0.036 μm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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CiteScore
3.40
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0.00%
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