Diameter Scaling in III-V Gate-All-Around Transistor for Different Cross-Sections

P. Rastogi, A. Dasgupta, A. Chauhan
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引用次数: 1

Abstract

We explore the impact of channel area scaling in InGaAs gate-all-around transistor for circular (CNW), square (SNW) and triangular (TNW) cross-sections using coupled selfconsistent Schrodinger-Poisson solver. We find that, among all three cross-sections, TNW shows the strongest confinement effect for all the considered dimensions. The confinement effects are significant at 10 nm for TNW and at 5 nm for SNW and CNW. We further analyzed the performance figure of merits (threshold voltage, current ON/OFF ratio, sub-threshold slope, ON current and intrinsic delay with cross-section area scaling) for all three cross-sections. Based on the scaling trend we find that CNW with 10 nm diameter is the most optimum among all three crosssections.
不同截面下III-V栅极全能晶体管的直径缩放
我们利用耦合自一致薛定谔-泊松求解器探讨了InGaAs栅极全能晶体管中圆形(CNW)、方形(SNW)和三角形(TNW)横截面沟道面积缩放的影响。我们发现,在所有三个截面中,TNW对所有考虑的维度都表现出最强的约束效应。TNW在10 nm处、SNW和CNW在5 nm处的约束效应显著。我们进一步分析了所有三个截面的优点性能图(阈值电压,电流开/关比,亚阈值斜率,开电流和具有截面面积缩放的固有延迟)。根据结垢趋势,我们发现直径为10 nm的CNW在三种截面中是最优的。
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