Gabriel Banarie, D. McDonagh, Viorel Bucur, Stefan Marinca, M. Bodea
{"title":"A BJT BiCMOS Temperature Sensor with a Two-Point Calibrated Inaccuracy of 0.1°C (3σ) from -40 to 125°C","authors":"Gabriel Banarie, D. McDonagh, Viorel Bucur, Stefan Marinca, M. Bodea","doi":"10.1109/ISSC.2018.8585351","DOIUrl":null,"url":null,"abstract":"This paper presents a temperature sensor core implemented in standard 0.6µm BiCMOS technology. Due to its intrinsic linearity, the sensor is capable of achieving an inaccuracy of −0.065°C / +0.035°C (3σ) over -40°C to 125°C temperature range after calibration in oil bath at two temperatures. The low output resistance of the core, 5Ω typical value, makes its voltage output signal suitable to be processed by a wide range of analogue-to-digital converters. It also allows multiple instances of the core to be stacked providing a trade-off between noise, supply voltage and silicon area","PeriodicalId":174854,"journal":{"name":"2018 29th Irish Signals and Systems Conference (ISSC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 29th Irish Signals and Systems Conference (ISSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSC.2018.8585351","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a temperature sensor core implemented in standard 0.6µm BiCMOS technology. Due to its intrinsic linearity, the sensor is capable of achieving an inaccuracy of −0.065°C / +0.035°C (3σ) over -40°C to 125°C temperature range after calibration in oil bath at two temperatures. The low output resistance of the core, 5Ω typical value, makes its voltage output signal suitable to be processed by a wide range of analogue-to-digital converters. It also allows multiple instances of the core to be stacked providing a trade-off between noise, supply voltage and silicon area