A CMOS even harmonic mixer with current reuse for low power applications

Ming-Feng Huang, Shuenn-Yuh Lee, C. Kuo
{"title":"A CMOS even harmonic mixer with current reuse for low power applications","authors":"Ming-Feng Huang, Shuenn-Yuh Lee, C. Kuo","doi":"10.1145/1013235.1013307","DOIUrl":null,"url":null,"abstract":"This paper presents a novel topology for the even harmonic mixer (EHM). The proposed mixer employs current reuse and double frequency circuits in the RF input stage and LO stage, respectively, to improve its linearity and isolation. In addition, the proposed topology has the advantage of low power consumption. In order to demonstrate the benefits of the proposed mixer, theoretical analyses of conversion gain and linearity have been described in detail. The measured results reveal that the proposed mixer possesses single-end conversion gain of 8 dB and third-order input intercept point (IIP/sub 3/) of -3.8 dBm, respectively, under a supply voltage of 1.8 V and LO power of 4 dBm. The power consumption of the proposed mixer is about 1.4 mW at 900 MHz.","PeriodicalId":120002,"journal":{"name":"Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2004-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1013235.1013307","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

This paper presents a novel topology for the even harmonic mixer (EHM). The proposed mixer employs current reuse and double frequency circuits in the RF input stage and LO stage, respectively, to improve its linearity and isolation. In addition, the proposed topology has the advantage of low power consumption. In order to demonstrate the benefits of the proposed mixer, theoretical analyses of conversion gain and linearity have been described in detail. The measured results reveal that the proposed mixer possesses single-end conversion gain of 8 dB and third-order input intercept point (IIP/sub 3/) of -3.8 dBm, respectively, under a supply voltage of 1.8 V and LO power of 4 dBm. The power consumption of the proposed mixer is about 1.4 mW at 900 MHz.
低功耗应用的CMOS均匀谐波混频器电流复用
提出了一种新的均匀谐波混频器拓扑结构。本文提出的混频器在射频输入级和本振级分别采用电流复用和双频电路,以提高其线性度和隔离度。此外,所提出的拓扑结构具有低功耗的优点。为了证明所提出的混频器的优点,对转换增益和线性度进行了详细的理论分析。测量结果表明,在1.8 V电源电压和4 dBm本端功率下,该混频器的单端转换增益为8 dB,三阶输入截距点(IIP/sub 3/)为-3.8 dBm。所提出的混频器在900 MHz时的功耗约为1.4 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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