J. Jou, Pei-Yin Chen, Yeu-Horng Shiau, Ming-Shiang Liang
{"title":"A scalable pipelined architecture for separable 2-D discrete wavelet transform","authors":"J. Jou, Pei-Yin Chen, Yeu-Horng Shiau, Ming-Shiang Liang","doi":"10.1109/ASPDAC.1999.759996","DOIUrl":null,"url":null,"abstract":"This paper presents a highly scalable efficient architecture for separable 2-D Discrete Wavelet Transform (DWT) which is simple, regular, modular and pipelined for the computation of 2-D DWT. With these properties, it is easily scalable for different filter lengths and different octave levels. In addition, the architecture has the characteristics of lower hardware cost, shorter latency, and higher throughput rate.","PeriodicalId":201352,"journal":{"name":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","volume":"132 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.1999.759996","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
This paper presents a highly scalable efficient architecture for separable 2-D Discrete Wavelet Transform (DWT) which is simple, regular, modular and pipelined for the computation of 2-D DWT. With these properties, it is easily scalable for different filter lengths and different octave levels. In addition, the architecture has the characteristics of lower hardware cost, shorter latency, and higher throughput rate.