Efficient fast algorithm and FPSoC for integer and fractional motion estimation in H.264/AVC

Abstract

In this paper we propose an efficient motion estimation algorithm as well as its supporting FPGA-based, field programmable system-on-chip (FPSoC), for integer and fractional motion estimation. Our results show that the ratedistortion loss of our algorithm is insignificant when compared to full search in H.264/AVC, while our FPSoC is hardware-efficient, even out-performing some state-of-the-art ASIC implementations.