Power Estimation Method Based on Real Measurements for Processor-Based Designs on FPGA

Shereen Afifi, F. Verdier, C. Belleudy
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引用次数: 8

Abstract

FPGA is considered to be a good platform for rapid prototyping of embedded designs. The power consumption is a growing problem with FPGAs, which is required to be optimized. In this paper, a method is proposed to estimate the dynamic power consumption of Micro Blaze based processing unit used in embedded designs for FPGA. The proposed method is based on experimental bench of implemented designs where the processing unit is repeated distinctly, and on real power measurements after downloading implemented applications on Virtex-6 FPGA using Xilinx Chip Scope tool. As a result of the considerable dynamic power variation, the dynamic power consumption of the Micro Blaze processing unit without the Floating Point Unit (FPU) is estimated to be 84 mW, and 102 mW with enabling the FPU. The proposed method is verified to be accurate, by comparing its based realistic power measurements with the XPower estimated results.
基于实际测量的FPGA处理器功率估计方法
FPGA被认为是嵌入式设计快速成型的良好平台。功耗是fpga日益严重的问题,需要对其进行优化。本文提出了一种用于FPGA嵌入式设计的基于Micro Blaze的处理器动态功耗估算方法。所提出的方法是基于实现设计的实验平台,其中处理单元明显重复,并在使用Xilinx Chip Scope工具下载Virtex-6 FPGA上的实现应用程序后进行实际功率测量。由于相当大的动态功率变化,没有浮点单元(FPU)的Micro Blaze处理单元的动态功耗估计为84兆瓦,启用FPU的动态功耗为102兆瓦。通过将基于实际功率测量结果与XPower估计结果进行比较,验证了该方法的准确性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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