Backward compatible MIL-STD-1553B analog transceiver upgrade for 100-Mb/s data rate

P. Pendyala, V. Pasupureddi
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Abstract

MIL-STD-1553B data buses are in use in almost all aircrafts and many ground-based military vehicles. But, present day aircraft equipments have much higher bandwidth requirements compared to what is offered by 1-Mb/s legacy 1553 system hardware. A complete rewiring would result in the aircrafts being non operational for a long time, in addition to its high cost of implementation. Instead, only the obsolete MIL-STD-1553 system-on-chip integrated circuits can be substituted to extend their functionality to higher data rates. In this work, we describe the operating principle and implementation of a low power transceiver upgrade which effectively equalizes a 1553 channel across the whole 100-MHz spectrum. Implemented in 0.18μm, this transceiver upgrade circuit achieves a BER of < 10−16 over a 300-ft 1553 bus while receiving 100-Mb/s data, with a total power consumption of 31.7 mW from a 3.3-V supply.
向后兼容MIL-STD-1553B模拟收发器升级为100 mb /s数据速率
MIL-STD-1553B数据总线几乎在所有飞机和许多地面军用车辆中使用。但是,与1m /s的传统1553系统硬件相比,目前的飞机设备具有更高的带宽要求。完全重新布线将导致飞机在很长一段时间内无法使用,而且实施成本也很高。相反,只有过时的MIL-STD-1553片上系统集成电路可以替代,以扩展其功能到更高的数据速率。在这项工作中,我们描述了一种低功耗收发器升级的工作原理和实现,该升级有效地均衡了整个100 mhz频谱上的1553信道。该收发器升级电路实现在0.18μm中,在300英尺1553总线上实现了< 10−16的误码率,同时接收100 mb /s的数据,在3.3 v电源下的总功耗为31.7 mW。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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