{"title":"Metal-gate resistance with skin effect consideration in nanoscale MOSFETs for millimeter-wave ICs","authors":"S. Lam, M. Chan","doi":"10.1109/INEC.2014.7460421","DOIUrl":null,"url":null,"abstract":"Copper metal gate has been introduced in logic CMOS processes starting from the 45-nm technology node. With the skin depth of about 270 nm at 60 GHz for copper, the DC end-to-end resistance of the copper gate electrode is found to be Rdc ≈ 9 Ω for a 45-nm MOSFET with W/L = 30 and it is a good estimation of the actual effective resistance Rac with less than 1% error. Rac of copper-gate electrode with rectangular cross-sectional designs is investigated with skin effect consideration. Design guidelines are suggested for device optimization of nanoscale metal-gate MOSFETs for millimeter-wave integrated circuits.","PeriodicalId":188668,"journal":{"name":"2014 IEEE International Nanoelectronics Conference (INEC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE International Nanoelectronics Conference (INEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INEC.2014.7460421","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Copper metal gate has been introduced in logic CMOS processes starting from the 45-nm technology node. With the skin depth of about 270 nm at 60 GHz for copper, the DC end-to-end resistance of the copper gate electrode is found to be Rdc ≈ 9 Ω for a 45-nm MOSFET with W/L = 30 and it is a good estimation of the actual effective resistance Rac with less than 1% error. Rac of copper-gate electrode with rectangular cross-sectional designs is investigated with skin effect consideration. Design guidelines are suggested for device optimization of nanoscale metal-gate MOSFETs for millimeter-wave integrated circuits.