A 128Mb Floating Body RAM(FBRAM) on SOI with Multi-Averaging Scheme of Dummy Cell

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. Pub Date : 2006-06-15 DOI:10.1109/VLSIC.2006.1705369

T. Ohsawa, T. Higashi, K. Fujita, K. Hatsuda, N. Ikumi, T. Shino, H. Nakajima, Y. Minami, N. Kusunoki, A. Sakamoto, J. Nishimura, T. Hamamoto, S. Fujii

引用次数: 9

Abstract

A 128Mbit FBRAM using the floating body cell (FBC) the size of 0.17mum² (6.24F² with F=0.165mum) was successfully fabricated and a high bit yield (~99.999%) was obtained

查看原文本刊更多论文

基于虚拟单元多重平均方案的128Mb浮体内存(FBRAM)

采用尺寸为0.17mum2 (6.24F2, F=0.165mum)的浮体电池(FBC)成功制备了128Mbit的FBRAM，获得了较高的位元率(~99.999%)

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.

自引率

0.00%

发文量