Enhancement Of Positive Bias Stress Stability For IGZO TFTs By A CAAC Gd-AZO Bulk Layer

Abstract

A c-axis-aligned crystalline Gd-Al-Zn-O (CAAC Gd-AZO) layer is implemented at the interface between the active layer and dielectric to enhance positive gate bias stress (PBS) stability of In-Ga-Zn-O thin film transistors (IGZO TFTs). The Gd-AZO bulk layer diminishes the root-mean-square (RMS) roughness of the IGZO back channel layer, which leads to the smaller threshold voltage shift $(\Delta \mathrm {V}_{T})$ of the Gd-AZO/IGZO TFTs than the IGZO/IGZO TFTs.