A sub 2ns ECL to CMOS level converter in 1μm BiCMOS technology

Abstract

A new circuit for level conversion in BiCMOS technology is proposed in this paper. This circuit converts signals from an ECL environment using a bipolar voltage controlled current source followed by a CMOS current controlled voltage source. This scheme provides both high speed and low sensitivity to parameter variation at a moderate power consumption. Simulation shows, that delaytimes less than 2ns in a 1μm technology can be achieved for loads of 500fF at a power consumption of 5mW.