Sub-micron BiCMOS process design for manufacturing

Abstract

A 0.5- mu m BiCMOS process is used to illustrate the details in process design needed as a prerequisite for success in manufacturing. An existing CMOS process was used as the core for the BiCMOS process; CMOS design rules and performance were not altered by the addition of the bipolar processes. Issues related to bipolar integration, individual process modules, interactions between CMOS and bipolar, and manufacturability are discussed in detail. The specific performance targets for the bipolar devices are outlined. This process has been targeted to be used in building future high-performance ASIC products.<>