Verification of etching rule in CAES

N. Baba, K. Makino, T. Kakinaga, O. Tabata, Y. Isono, J. Korvink
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Abstract

In this work, a relation between a removal probability in CAES and a calculated silicon etching rate was clarified. In order to verify the relation precisely, the number of removal probabilities utilized in CAES were increased from four to nine and simulation of etching rates were carried out with changing the removal probabilities. From these simulation results, the effects of removal probabilities on etching rates were clarified. Based on the obtained relation, experimentally obtained etching rates on various crystallographic planes were fitted by the CAES simulation. Although the experimental data was possible to fit mostly by CAES simulation, the accuracy of simulation was limited.
CAES中蚀刻规律的验证
在这项工作中,澄清了CAES中去除概率与计算的硅蚀刻速率之间的关系。为了精确地验证这种关系,将CAES中使用的去除概率从4个增加到9个,并在改变去除概率的情况下进行蚀刻速率的模拟。从这些模拟结果中,明确了去除概率对蚀刻速率的影响。在此基础上,用CAES模拟方法拟合了不同晶体平面上实验得到的刻蚀速率。虽然CAES模拟能较好地拟合实验数据,但模拟精度有限。
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