{"title":"Design and simulation of asynchronous level crossing ADC using feedback DAC","authors":"A. Antony, Shobha Rekh Paulson, D. Moni","doi":"10.1109/CSPC.2017.8305840","DOIUrl":null,"url":null,"abstract":"Design and implementation of an asynchronous LC-ADC with feedback DAC in 180nm technology using cadence is presented in this paper. Operating at 110Hz using 0.8 V supply voltage, the ADC achieves 47dB SNDR for 684nW power consumption. This paper also presents a charge sharing 1 bit DAC with pseudo resistors and dummy devices suitable for an asynchronous level crossing ADC.","PeriodicalId":123773,"journal":{"name":"2017 International Conference on Signal Processing and Communication (ICSPC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on Signal Processing and Communication (ICSPC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSPC.2017.8305840","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
Design and implementation of an asynchronous LC-ADC with feedback DAC in 180nm technology using cadence is presented in this paper. Operating at 110Hz using 0.8 V supply voltage, the ADC achieves 47dB SNDR for 684nW power consumption. This paper also presents a charge sharing 1 bit DAC with pseudo resistors and dummy devices suitable for an asynchronous level crossing ADC.