A novel MASH 2-1 sigma-delta A/D converter with high-to-low conversion for closed-loop MEMS accelerometer interface

Hongzhe Li, Feng Wu, Meng Zhao, Zhongjian Chen, Wengao Lu, Yacong Zhang
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引用次数: 1

Abstract

In this paper, an A/D converter offering the high-to-low level shifter function applied to the high range digital closed-loop MEMS accelerometer interface is presented. In the interface circuit, the analog front-end circuit works in the high-voltage domain and the digital back-end circuit works in the low-voltage domain, however, the cascade MASH 2-1 sigma-delta ADC just can achieve high-voltage signal converting to low-voltage signal without introducing additional high-to-low transition module. The level shifter is mainly realized by the first integrator by means of using switched-capacitor charge transfer principle. The cascade MASH 2-1 sigma-delta ADC performs a maximum signal-to-noise-plus-distortion ratio (S/(N+D)) rms/rms of 113.6 dB with 200 Hz bandwidth and sampling clock of 100-kHz. The interface was designed in TSMC 0.35 um CMOS process and was sent to the foundry to prototype.
用于闭环MEMS加速度计接口的新型MASH 2-1 σ - δ A/D转换器的高-低转换
本文介绍了一种用于高量程数字闭环MEMS加速度计接口的具有高低电平转换功能的A/D转换器。在接口电路中,模拟前端电路工作在高压域,数字后端电路工作在低压域,而级联式MASH 2-1 σ - δ ADC刚好可以实现高压信号到低压信号的转换,无需额外引入高到低转换模块。电平转移器主要由第一积分器利用开关电容电荷转移原理实现。级联MASH 2-1 σ - δ ADC的最大信噪比(S/(N+D)) rms/rms为113.6 dB,带宽为200 Hz,采样时钟为100 khz。该接口采用台积电0.35 um CMOS工艺设计,并送到代工厂进行原型设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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