An accurate low iteration algorithm for effective capacitance computation

Shizhong Mei, Y. Ismail
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引用次数: 6

Abstract

This paper presents an efficient and accurate approach to calculate effective capacitances in the presence of RC interconnect loads. In the pre-characterization process, the gate model is selected such that the output of the model matches both the delay and the shape of the real gate response. In order to determine the effective capacitance, a novel algorithm is developed to efficiently and accurately calculate the propagation delay from circuit elements. This algorithm requires at most two iterations to obtain effective capacitances that produce gate delays within 4% of HSPICE results. This is at most half the time required by the currently used method to calculate effective capacitances.
有效电容计算的精确低迭代算法
本文提出了一种计算RC互连负载时有效电容的有效方法。在预表征过程中,选择栅极模型,使模型的输出与实际栅极响应的延迟和形状相匹配。为了确定有效电容,提出了一种新的算法,可以有效准确地计算电路元件的传播延迟。该算法最多需要两次迭代才能获得有效电容,产生的门延迟在HSPICE结果的4%以内。这最多是目前使用的计算有效电容的方法所需时间的一半。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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