{"title":"An All-Thin-Devices Level Shifter in Standard-Cell Format for Auto Place-and-Route Flow","authors":"Nestor Cuevas, Javier Ardila, E. Roa","doi":"10.1109/LASCAS.2019.8667578","DOIUrl":null,"url":null,"abstract":"This paper proposes a standard-cell format all-thin-devices level shifter suited for commercial digital-flow tools. Despite the fact that it is possible to find commercial level-shifter cells in standard-cell format, those cells require a mixed of thick- and thin-devices. The use of only thin-oxide transistors allows placing level shifters within thin-device based digital cells, optimizing area and place-and-route process. Due to the maximum voltage ratings of thin transistors, we adopted a switching technique to prevent high voltage differences between their terminals, avoiding a possible device breakdown. The proposed level shifter occupies an area of 156µm2 in a 0.18µm CMOS node.","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2019.8667578","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This paper proposes a standard-cell format all-thin-devices level shifter suited for commercial digital-flow tools. Despite the fact that it is possible to find commercial level-shifter cells in standard-cell format, those cells require a mixed of thick- and thin-devices. The use of only thin-oxide transistors allows placing level shifters within thin-device based digital cells, optimizing area and place-and-route process. Due to the maximum voltage ratings of thin transistors, we adopted a switching technique to prevent high voltage differences between their terminals, avoiding a possible device breakdown. The proposed level shifter occupies an area of 156µm2 in a 0.18µm CMOS node.