A methodology for fault model development for hierarchical linear systems

Abstract

In this paper, a methodology to develop fault models for hierarchical linear systems which are composed of operational amplifiers (OP) is demonstrated and presented. The methodology at first presents a transfer function model for the open-loop OP based on analysis of element faults at the transistor level. Then it derives a transfer function model for the closed loop OP based on the derived open-loop OP level model, again a higher level fault model for a module which is composed of closed loop OPs. The models can handle ac faults. The benchmark state-variable filter is used as an example to demonstrate for this methodology. An application of the derived models to Monte Carlo simulation to save computation time is also demonstrated.