Single Stage PFC Flyback AC-DC Converter Design

Kali Naraharisetti, Janamejaya Channegowda
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引用次数: 3

Abstract

This paper discusses a 100 W single stage Power Factor Correction (PFC) flyback converter operating in boundary mode constant ON time methodology using a synchronous MOS-FET rectifier on the secondary side to achieve higher efficiency. Unlike conventional designs which use two stage approach such as PFC plus a LLC resonant stage or a two stage PFC plus flyback, the proposed design integrates the PFC and constant voltage regulation in a single stage without compromising the efficiency of the converter. The proposed design is advantageous as it has a lower component count. A design of 100 W flyback operating from universal input AC line voltage is demonstrated in this paper. The experimental results show that the power factor (PF) is greater than 0.92 and total harmonic distortion (iTHD) is less than 20% for a load varying from 25 % to 100 %. The experimental results show the advantages of a single stage design.
单级PFC反激式AC-DC变换器设计
本文讨论了一种100w单级功率因数校正(PFC)反激变换器,工作在边界模式恒定导通时间方法中,在二次侧使用同步MOS-FET整流器以获得更高的效率。与使用两级方法(如PFC加LLC谐振级或两级PFC加反激)的传统设计不同,所提出的设计将PFC和恒压调节集成在单级中,而不会影响转换器的效率。所提出的设计是有利的,因为它具有较低的组件计数。本文介绍了一种100w反激电路的设计方法,该电路的输入电压为交流通用电压。实验结果表明,在25% ~ 100%负载范围内,功率因数(PF)大于0.92,总谐波失真(iTHD)小于20%。实验结果表明了单级设计的优越性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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