0.15 /spl mu/m CMOS with high reliability and performance

K. Takeuchi, T. Yamamoto, A. Tanabe, T. Matsuki, T. Kunio, M. Fukuma, K. Nakajima, H. Aizaki, H. Miyamoto, E. Ikawa
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引用次数: 12

Abstract

0.15 /spl mu/m CMOSFETs with high reliability and performance have been realized. The acceptable power supply voltage V/sub cc/ was estimated to be 1.9 V. A reasonably short ring oscillator delay of 33 ps was obtained for the 1.9 V V/sub cc/, maintaining an 0.4 V threshold voltage. Anomalous surface state generation and V/sub TH/ shift for the pMOS were observed, though the degradation was less severe than the nMOS.<>
0.15 /spl mu/m CMOS,可靠性和性能高
实现了高可靠性、高性能的0.15 /spl mu/m cmosfet。可接受的电源电压V/sub cc/估计为1.9 V。在1.9 V/sub / cc/下,获得了33 ps的合理短环振荡器延迟,保持了0.4 V的阈值电压。虽然pMOS的降解程度没有nMOS严重,但pMOS的表面态产生和V/sub - TH/位移都是异常的。
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