Z2-FET memory matrix in 28 nm FDSOI technology

Abstract

The article puts forth the comparison between the two available options of Z2-FET in 28 nm technological node, i.e. thin and thick gate-oxide. Thin gate-oxide technology favors the sense margin and scalability of dimensions and bias but suffers from higher gate leakage leading to poor retention and higher variability. On the other hand, thick-gate oxide device offers similar sense margin with long retention. TCAD mixed mode simulations show that Z2-RAM can be implemented successfully in the DRAM array with good performance metrics that can be further improved.