Paulo Garcia, T. Gomes, F. Salgado, J. Cabral, J. Monteiro, A. Tavares
{"title":"RAPTOR-Design: Refactorable Architecture Processor to Optimize Recurrent Design","authors":"Paulo Garcia, T. Gomes, F. Salgado, J. Cabral, J. Monteiro, A. Tavares","doi":"10.1109/SBESC.2012.55","DOIUrl":null,"url":null,"abstract":"The growth in embedded systems complexity has created the demand for novel tools which allow rapid systems development and facilitate the designer's management of complexity. Especially since systems must incorporate a variety of often contradictory characteristics, achieving design metrics in short development time is an increasing challenge. This paper presents RAPTOR-Design, a framework for System-on-Chip (SoC) design which incorporates a customizable processor architecture and allows rapid software-to-hardware migration, custom hardware integration in a tightly-coupled fashion and seamless Fault Tolerance (FT) capabilities for FPGA platforms. Impact on design metrics of processor customization, FT-capabilities and custom hardware integration are presented, as well as an overview of the design process using RAPTOR-Design.","PeriodicalId":112286,"journal":{"name":"2012 Brazilian Symposium on Computing System Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 Brazilian Symposium on Computing System Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SBESC.2012.55","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The growth in embedded systems complexity has created the demand for novel tools which allow rapid systems development and facilitate the designer's management of complexity. Especially since systems must incorporate a variety of often contradictory characteristics, achieving design metrics in short development time is an increasing challenge. This paper presents RAPTOR-Design, a framework for System-on-Chip (SoC) design which incorporates a customizable processor architecture and allows rapid software-to-hardware migration, custom hardware integration in a tightly-coupled fashion and seamless Fault Tolerance (FT) capabilities for FPGA platforms. Impact on design metrics of processor customization, FT-capabilities and custom hardware integration are presented, as well as an overview of the design process using RAPTOR-Design.