Intel's Post Silicon functional validation approach

Tommy Bojan, I. Frumkin, R. Mauri
{"title":"Intel's Post Silicon functional validation approach","authors":"Tommy Bojan, I. Frumkin, R. Mauri","doi":"10.1109/HLDVT.2007.4392786","DOIUrl":null,"url":null,"abstract":"CPU Post-Silicon functional validation is the last \"guardian\" logic-wise before delivering the product to the market. In each CPU generation, the challenges are larger due to increasingly complex architectures, budget constraints and shorter schedules. Success can be achieved just with the novel approaches across different validation teams, and with a complex of state-of-the-art validation software, hardware, execution and silicon debug environments. Budget constraints lead to high automation and efficient validation process. Though Intel Corporation has different divisions, mutual help and hard work and optimization ensures high quality product within the schedule.","PeriodicalId":204520,"journal":{"name":"High Level Design Validation and Test Workshop","volume":"526 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"High Level Design Validation and Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2007.4392786","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

Abstract

CPU Post-Silicon functional validation is the last "guardian" logic-wise before delivering the product to the market. In each CPU generation, the challenges are larger due to increasingly complex architectures, budget constraints and shorter schedules. Success can be achieved just with the novel approaches across different validation teams, and with a complex of state-of-the-art validation software, hardware, execution and silicon debug environments. Budget constraints lead to high automation and efficient validation process. Though Intel Corporation has different divisions, mutual help and hard work and optimization ensures high quality product within the schedule.
英特尔的后硅功能验证方法
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信