E. V. Ploeg, C. T. Nguyen, N. Kistler, S. Wong, J. Woo, J. Plummer
{"title":"First direct beta measurenent for parasitic lateral bipolar transistors in fully-depleted SOI MOSFETs","authors":"E. V. Ploeg, C. T. Nguyen, N. Kistler, S. Wong, J. Woo, J. Plummer","doi":"10.1109/DRC.1993.1009566","DOIUrl":null,"url":null,"abstract":"Summary form only given. Direct measurements of beta values in SOI (silicon-on-insulator) MOSFETs biased in normal operating regimes are presented. The measurements were made on an SOI structure that allows for the efficient collection of the hole current after it has entered the source region and caused the bipolar back-injection of electrons. By measuring the drain and substrate currents and making extrapolated estimates of the intrinsic MOS channel current, it is possible to calculate values of the gain of the parasitic bipolar device for any bias condition. The V/sub GS/=V/sub T/ case is of greatest interest, because the drain-to-source breakdown voltage is generally smallest for this value of gate potential. beta was found to be highly dependent on the value of V/sub D/, with beta falling dramatically with increasing V/sub D/. As V/sub D/ is increased from 2.5 V to 4.5 V, with V/sub GS/-V/sub T/ held at 0 V, beta falls from about 1000 to 20 for an L=1.3 mu m, T/sub SOI/=1000 AA device. >","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"51st Annual Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.1993.1009566","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Summary form only given. Direct measurements of beta values in SOI (silicon-on-insulator) MOSFETs biased in normal operating regimes are presented. The measurements were made on an SOI structure that allows for the efficient collection of the hole current after it has entered the source region and caused the bipolar back-injection of electrons. By measuring the drain and substrate currents and making extrapolated estimates of the intrinsic MOS channel current, it is possible to calculate values of the gain of the parasitic bipolar device for any bias condition. The V/sub GS/=V/sub T/ case is of greatest interest, because the drain-to-source breakdown voltage is generally smallest for this value of gate potential. beta was found to be highly dependent on the value of V/sub D/, with beta falling dramatically with increasing V/sub D/. As V/sub D/ is increased from 2.5 V to 4.5 V, with V/sub GS/-V/sub T/ held at 0 V, beta falls from about 1000 to 20 for an L=1.3 mu m, T/sub SOI/=1000 AA device. >