Synergistic Effect of BTI and Process Variations on Impact and Monitoring of Combination Circuit

Abstract

With the technology node scaling down, aging effect and process variations have become the most critical reliability issues for integrated circuit. In this paper, the influence of BTI effect and process variation on threshold voltage is analyzed. Then, the delay of logic gate and the change of subthreshold current are deduced from the change of threshold voltage. Finally, the logic gate and ISCAS85 circuit are simulated by HSPICE in PTM 45nm model. Simulation results show the relationship between delay and subthreshold current with aging time, which can be used to predict the degradation of circuit parameters. The change of circuit delay can be quickly monitored by measuring subthreshold current.