10 bit current steering DAC in 90 nm technology

Abstract

The design of a high speed current steering DAC using 90 nm CMOS technology is presented. The resolution for this design is 10 bits, segmented into 6 thermometer encoded current cells and 4 binary weighted current cells. Thermometer encoding is used instead of binary coded decimal to reduce glitches since only one bit changes at a time. The design methodology of the sub-components such as current cell, thermometer encoder, and bias circuits are discussed. The simulation results show the input bandwidth of the DAC is 250 MHz.