EMC immunity of integrated smart power transistors in a non-50Ω environment

Abstract

The Direct Power Injection (DPI) standard, widely used for the susceptibility analysis of integrated circuits (IC), specifies an ideal 50Ω-environment for the investigations. This constant load assumption does not fully cover latter stages or the IC final operating environment, where ICs are subjected to various load impedances, especially at pins which are connected to wiring harnesses. We present variable-load DPI measurements and large-signal simulations for new circuit blocks, namely a simplified high-side driver and an ESD structure. The results extend the applicability of small-signal simplification methods beyond a low-side driver formerly reported by the same authors.