Secured MPFAL Logic for IoT Applications

Abstract

Data security and energy efficiency are major concerns of applications designed for wireless body area networks. The latest advances in sensors and advanced device architectures have shown numerous possibilities in energy-efficient design styles in IC manufacturing. The need of a better battery life puts stringent constrains on power consumption of electronic systems. Hence the design and development of energy-efficient systems, circuits with security as main emphasis becomes more crucial in the field of Wireless Sensor Networks (WSN) and IoT. In these applications security is implemented using Advanced Encryption Standard (AES). In AES architecture substitution box is the most power consuming area and is often prone to Differential Power Analysis (DPA) attacks. In this paper, an 8-bit substitution box is implemented with an energy recovery modified PFAL (MPFAL) adiabatic logic using the FinFET device at a 45 nm technology node. The usefulness of the designed circuits with MPFAL is estimated by comparing the performance with our previous work. The compiled simulations shown that 49% of power dissipation reduction than ECRL based S-box design. The circuits delay is improved by 19% for the MPFAL S-box circuit.