Scaling-up ESOP Synthesis for Quantum Compilation

B. Schmitt, Mathias Soeken, G. Micheli, A. Mishchenko
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引用次数: 4

Abstract

Today's rapid advances in quantum computing hardware call for scalable synthesis methods to map combinational logic represented as multi-level Boolean networks (e.g., an and-inverter graph, AIG) to quantum circuits. Such synthesis process must yield reversible logic function since quantum circuits are reversible. Thus, logic representations using exclusive sum-of-products (ESOP) are advantageous because of their natural relation to Toffoli gates, one of the primitives in reversible logic. This motivates developing effective methods to collapse AIG logic networks into ESOPs. In this work, we present two state-of-the-art methods to collapse an AIG into an ESOP expression, describe their shortcomings and introduce a new approach based on the divide-and-conquer paradigm. We demonstrate the effectiveness of our method in collapsing IEEE-compliant half precision floating point networks. Results show that our method can collapse designs-which were previously not solvable within a week-in less than 5 minutes. We also describe a technique capable of taking advantage of this new method to generate quantum circuits with up to 50% fewer $T$ gates compared to state-of-the-art methods.
量子编译中ESOP综合的放大
当今量子计算硬件的快速发展需要可扩展的合成方法来将表示为多级布尔网络的组合逻辑(例如,一个和逆变器图,AIG)映射到量子电路。由于量子电路是可逆的,这种合成过程必须产生可逆的逻辑函数。因此,使用独占积和(ESOP)的逻辑表示是有利的,因为它们与可逆逻辑中的原语之一Toffoli门有自然的关系。这促使开发有效的方法将AIG逻辑网络分解为esop。在这项工作中,我们提出了两种最先进的方法将AIG分解为ESOP表达式,描述了它们的缺点,并介绍了一种基于分而治之范式的新方法。我们证明了该方法在符合ieee标准的半精度浮点网络崩溃中的有效性。结果表明,我们的方法可以在不到5分钟的时间内完成以前无法在一周内解决的设计。我们还描述了一种能够利用这种新方法产生量子电路的技术,与最先进的方法相比,其$T$门减少了50%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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