A design of ultra-low noise LDO using noise reduction network techniques

Abstract

This paper presents an ultra-low noise low-dropout (LDO) regulators for powering RF applications. The proposed LDO employs two internal noise reduction network at the output of the bandgap reference (BGR), and between output and feedback resistors node (VFB in Fig. 1) of LDO to achieve ultra-low noise at interest frequencies. The 5-bits controlled resistor ladder is adopted to compensate the process, voltage, and temperature (PVT) variations. The output voltage level of LDO can be from 1.05 V to 2.6 V with trimming step of 50 mV. The highest output noise of the LDO is 64.52 nV/VHz at 10 KHz. The proposed LDO is implemented in CMOS 55 nm technology with the die size of 480 μm × 330 μm.