NoC Interface for fault-tolerant Message-Passing communication on Multiprocessor SoC platform

Abstract

A prevalent design paradigm in electronic systems design is the usage of multiple programmable processors on general purpose Multiprocessor System-on-Chip (MPSoC) platforms where processors and other sub-systems communicate through communication infrastructures called Network-on-Chip (NoC). This paper presents a new approach to a NoC Interface (NI) called Micronswitch Interface (MSI) designed for message-passing communication with a light-weight Micron Message-Passing (MMP) protocol on Micronmesh MPSoC platform. The operation of the MSI Hardware (HW) and Software (SW) are tightly coupled with that of the MMP protocol in order to improve communication performance. The MSI provides mechanisms for efficient buffer management and fault-tolerant communication which will be necessary for reliable and efficient operation of the MPSoCs. Performance analyses show that the MSI is also able to produce a good throughput and latency.