A Wide Band Fractional-N Synthesizer in 0.18um CMOS Process

Ebrahim Hosseini, Morteza Mousazadeh, A. Dadashi
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引用次数: 3

Abstract

In this paper, a wideband synthesizer with output range of 2.1GHz-2.5GHz and resolution of 1MHz and input reference of 50Mhz is proposed. In this method, firstly, by the Integer-N synthesizer based on PLL and constructed of blocks of PFD, CP, VCO and Frequency divider the input is increased with integer coefficients and it produces frequencies 2.1GHz, 2.15GHz,..., 2.5GHz very quickly. To get 1MHz steps in the output, a second loop that consists of blocks FVC, VCO and Voltage divider is used. In this method, the input frequency is high compared to the conventional methods, so the first loop will be locked very fast and the second loop will quickly move the output in steps 1MHz. As a result, changing channels will be very quick. This structure is very simple and has a low power consumption and a low output jitter, the proposed structure is designed in 0.18um CMOS process.
0.18um CMOS制程的宽带分数n合成器
本文提出了一种输出范围为2.1GHz-2.5GHz,分辨率为1MHz,输入基准为50Mhz的宽带合成器。该方法首先通过基于锁相环的整数n合成器,由PFD、CP、压控振荡器和分频器组成,将输入以整数系数增加,产生频率为2.1GHz、2.15GHz、…2.5GHz非常快。为了在输出中获得1MHz步长,使用了由FVC、VCO和分压器块组成的第二个环路。在这种方法中,与传统方法相比,输入频率很高,因此第一个环路将非常快地锁定,第二个环路将以1MHz的步长快速移动输出。因此,更换频道将非常迅速。该结构结构简单,功耗低,输出抖动小,采用0.18um CMOS工艺设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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