{"title":"A Reverse Converter for the Enhanced Moduli Set {2n-1, 2n+1, 22n, 22n+1-1} Using CRT and MRC","authors":"A. S. Molahosseini, K. Navi","doi":"10.1109/ISVLSI.2010.105","DOIUrl":null,"url":null,"abstract":"The moduli set {2n–1, 2n, 2n+1, 22n+1–1} has been newly introduced for residue number system (RNS) as an arithmetic-friendly large dynamic range moduli set which can lead to a fast RNS arithmetic unit. In this paper, we present a reverse converter for the moduli set {2n–1, 2n+1, 22n, 22n+1–1} which is derived from the moduli set {2n–1, 2n, 2n+1, 22n+1–1} by enhancing modulo 2n to 22n. With this enhancement the DR increased to 6n+1 bits, while the speed of moduli set for arithmetic unit is not changed. The reverse converter for the moduli set {2n–1, 2n, 2n+1, 22n+1–1} is obtained by considering an existing Chinese remainder theorem (CRT)-based design of reverse converter for the subset {22n, 2n–1, 2n+1} along with a two-channel mixed-radix conversion (MRC) algorithm for the composite set {22n (22n–1), 22n+1–1}.","PeriodicalId":187530,"journal":{"name":"2010 IEEE Computer Society Annual Symposium on VLSI","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Computer Society Annual Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2010.105","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 24
Abstract
The moduli set {2n–1, 2n, 2n+1, 22n+1–1} has been newly introduced for residue number system (RNS) as an arithmetic-friendly large dynamic range moduli set which can lead to a fast RNS arithmetic unit. In this paper, we present a reverse converter for the moduli set {2n–1, 2n+1, 22n, 22n+1–1} which is derived from the moduli set {2n–1, 2n, 2n+1, 22n+1–1} by enhancing modulo 2n to 22n. With this enhancement the DR increased to 6n+1 bits, while the speed of moduli set for arithmetic unit is not changed. The reverse converter for the moduli set {2n–1, 2n, 2n+1, 22n+1–1} is obtained by considering an existing Chinese remainder theorem (CRT)-based design of reverse converter for the subset {22n, 2n–1, 2n+1} along with a two-channel mixed-radix conversion (MRC) algorithm for the composite set {22n (22n–1), 22n+1–1}.