{"title":"A low complexity baseband transceiver for in-vehicle power line communications","authors":"Chun-Lin Lo, Yu-Lun Lin, Hsi-Pin Ma","doi":"10.1109/ITST.2012.6425194","DOIUrl":null,"url":null,"abstract":"In-vehicle power line communication (PLC) provides a solution for high data communication in the automotive networks without increasing volume, weight and cost of the wiring harnesses. In this paper, a high data rate OFDM baseband receiver for in-vehicle PLC is presented. Suffered harsh multipath vehicle power line effect, impulse noise and 25 p.p.m. sampling clock offset (SCO),the whole receiver is proposed to recover the signal with less-complexity-based design. Functional simulation shows system performance of the proposed receiver, and the logic design, for circuit implementation, of each function block are also presented. The required gate-count is around 595k under TSMC 90 nm technology, and complexity has 9.77 % saved-ratio comparing with direct implementation.","PeriodicalId":143706,"journal":{"name":"2012 12th International Conference on ITS Telecommunications","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 12th International Conference on ITS Telecommunications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITST.2012.6425194","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In-vehicle power line communication (PLC) provides a solution for high data communication in the automotive networks without increasing volume, weight and cost of the wiring harnesses. In this paper, a high data rate OFDM baseband receiver for in-vehicle PLC is presented. Suffered harsh multipath vehicle power line effect, impulse noise and 25 p.p.m. sampling clock offset (SCO),the whole receiver is proposed to recover the signal with less-complexity-based design. Functional simulation shows system performance of the proposed receiver, and the logic design, for circuit implementation, of each function block are also presented. The required gate-count is around 595k under TSMC 90 nm technology, and complexity has 9.77 % saved-ratio comparing with direct implementation.