Y. Chen, M. Gardner, J. Fulford, D. Wristers, A. Joshi, L. Chung, D. Kwong
{"title":"Enhanced hot-hole degradation in P/sup +/-poly PMOSFETs with oxynitride gate dielectrics","authors":"Y. Chen, M. Gardner, J. Fulford, D. Wristers, A. Joshi, L. Chung, D. Kwong","doi":"10.1109/VTSA.1999.786006","DOIUrl":null,"url":null,"abstract":"A significant degradation under hot-hole injection is observed in P/sup +/-poly PMOSFETs with oxynitride gate dielectrics. Both oxynitrides formed by gate oxide grown on Nitrogen Implanted Si Substrates (NISS) and NO-annealed SiO/sub 2/ oxynitride gate dielectrics are used and compared to control SiO/sub 2/ gate dielectrics of identical thicknesses. A physical model responsible for such enhanced degradation in PMOSFETs with oxynitride gate dielectric is proposed. It is shown that the hole injection barrier lowering as a result of the nitrogen-rich layer at the SiO/sub 2//Si interface in oxynitride is responsible for such enhanced degradation.","PeriodicalId":237214,"journal":{"name":"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)","volume":"155-156 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers. (Cat. No.99TH8453)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTSA.1999.786006","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A significant degradation under hot-hole injection is observed in P/sup +/-poly PMOSFETs with oxynitride gate dielectrics. Both oxynitrides formed by gate oxide grown on Nitrogen Implanted Si Substrates (NISS) and NO-annealed SiO/sub 2/ oxynitride gate dielectrics are used and compared to control SiO/sub 2/ gate dielectrics of identical thicknesses. A physical model responsible for such enhanced degradation in PMOSFETs with oxynitride gate dielectric is proposed. It is shown that the hole injection barrier lowering as a result of the nitrogen-rich layer at the SiO/sub 2//Si interface in oxynitride is responsible for such enhanced degradation.