Signal integrity and EMC performance enhancement using 3D integrated circuits - A case study

Abstract

In this paper, the signal integrity (SI) and Electromagnetic Compatibility (EMC) performance of a microcontroller and memory are simulated in 2D and 3D assembly versions. Three types of configurations are investigated: conventional 2D routing on printed-circuit-board, stacked dies with wire bonding and stacked dies with Through-Silicon-Via (TSV). The study addresses signal integrity of the memory bus and the conducted emission of the microcontroller. An equivalent bus model is presented for order reduction and improved simulation efficiency. The benefits of 3D integration are highlighted, in terms of improved eye diagram and one decade reduction in parasitic emission.